ET671 (Integrated) Digital Systems
COURSE DESCRIPTION: The goal of this course is to build on a student’s background from introductory courses in logic design. This course explores two aspects of modern integrated digital systems first the design of logic using behavioral modeling and second the investigation of Complementary Metal Oxide Semiconductor (CMOS) technology.
As the number of transistors on a chip has grown exponentially, digital system designers have come to rely on increasing levels of automation to seek corresponding productivity gains. Many designers spend much of their effort specifying functions with hardware description languages and seldom look at actual transistors. Nevertheless, chip design is not software engineering. Addressing the harder problems requires a fundamental understanding of circuit and physical design. Therefore, this course focuses on building an understanding of integrated circuits from the bottom up both physically and behaviorally.
The course will explore the use of HDLs in design, emphasizing descriptive styles that will allow the student to quickly design working circuits suitable for ASICs, SOC’s or field-programmable gate array (FPGA) implementation. Behavioral modeling with hardware description language (HDL) is the key to modern design of application-specific integrated (ASIC’s) and system on chip (SOC) circuits. Today, most designers use an HDL-based design method to create a high-level, language-based, abstract description of a circuit, and verify its functionality and timing. This course will explore digital hierarchy, synthesis, test methodology, and the development of test bench templates.
Additionally in this course, we will take a simpliﬁed view of CMOS transistors as switches. With this model we will develop CMOS logic gates and latches. CMOS transistors are mass-produced on silicon wafers using lithographic steps much like a printing press process. We will explore how to lay out transistors by specifying rectangles indicating where dopants should be diffused, polysilicon should be grown, metal wires should be deposited, and contacts should be etched to connect all the layers. By the end of this course, you will understand all the principles required to design and lay out your own digital system CMOS chip.
REQUIRED TEXT: CMOS VLSI DESIGN a Circuits and Systems Perspective
Neil H.E. Weste, David Money Harris
SOFTWARE: ISE, Cadence Design Systems
ET677 Integrated Analogy Systems
COURSE DESCRIPTION: This course will explore the analysis and design of analog systems. For the past several decades digital systems have increased in complexity and function. In industry there has been an attitude that eventually digital solutions of analog functions would reduce the need for analog analysis and design. The exact opposite is true, the need and demand for analog skills is strong and growing in today's electronics industry.
It remains true that with more complex digital systems analog function can be realized in logic. Ultimately we live in an analog world an environment of motion, temperature, light, sound and interaction with our electronic devices. As our electronic devices become smaller and more mobile our interaction with them is increasingly analog. Many applications today use a mixed signal approach, which rely on analog systems interfacing with digital systems.
This course will explore various applications of analog systems. Topics will cover the fundamentals of operational amplifiers the applications of amplifier circuits including feedback, amplifier limitations, stability, voltage references, power converters, and phase locked loops.
A series of weekly laboratory exercises will be assigned to link the concepts from lecture to hands on application. The use of standard electronics equipment will be required and the use of the Electronic Design Automation (EDA) tool Multisim from National Instruments and Cadence Design systems will be explored.
REQUIRED TEXT: Microelectronic Circuits Seventh Edition
SOFTWARE: MultiSim, Cadence Design Systems
*Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.
University of New Hampshire
Cadence University Program Member
last updated 9/10/2019